Short answer
• D-Wave does not publish a per-qubit “fidelity” in the sense used for gate-based processors, because quantum annealers do not execute a sequence of unitary gates whose average error can be characterised with protocols such as randomized benchmarking.
• All qubits and couplers are factory- and field-calibrated automatically before the system is made available to users. The outcome of that calibration – a table that maps the user-programmed dimensionless numbers hᵢ , Jᵢⱼ to the analogue control currents that are actually delivered – is stored inside the control electronics but is not exposed in detail through the public API.
• What the user does get is a processor that, after calibration, has typical residual control errors of a few parts in a hundred and a set of documented, processor-wide performance figures (qubit yield, working-coupler yield, maximum |h| and |J|, allowed anneal-offset range, read-out energy scale, operating temperature, etc.). These data can be queried from Ocean under qpu.properties.

Below is a more complete explanation.

1. “Fidelity” for a gate machine vs an annealer
   • In the circuit model, each elementary gate is supposed to implement a fixed, known unitary. One can therefore ask for the overlap between the implemented and ideal unitaries and use protocols such as randomized benchmarking (RB) to obtain an average error per gate.
   • In quantum annealing the control Hamiltonian is continuously changed from H_B to H_P during an “anneal” of duration τ. No single step is repeated many times, so the RB paradigm does not apply. Instead, one cares about
   – how accurately the time-dependent Hamiltonian realised on the chip matches the one requested by the user, and
   – how strongly the processor is coupled to unwanted degrees of freedom (noise, thermal environment), which determines the probability of ending in the ground state (or a low-lying state) of the user Hamiltonian.
   These ingredients are usually summarised under the headings control error, noise and effective temperature rather than “qubit fidelity”.

2. What D-Wave calibrates and how
   The calibration pipeline is described in several D-Wave technical reports, e.g.
   • R. Harris et al., “Calibration of D-Wave Quantum Processing Units” (DW-TR-14-012)
   • E. Lanting et al., “Entanglement in a Quantum Annealing Processor”, Phys. Rev. X 4, 021041 (2014) – Appendices give details on qubit and coupler calibration.
   The main steps (all performed in an automated fashion, typically every few hours or days) are:
   a) Qubit persistent-current (I_p) calibration – spectroscopy on each rf-SQUID yields its flux-tunnel splitting Δ and I_p(Φ).
   b) Local-field bias calibration (q-cal) – finds the control-current setting that makes ⟨σᶻ⟩=0 when hᵢ=0. Residual offset after q-cal is ≈0.001 of full-scale h.
   c) Coupler calibration (c-cal) – measures the strength of J_ij as a function of the coupler bias and inverts this map. RMS error after calibration is typically 0.5 – 1 % of full-scale J.
   d) Annealing-waveform calibration – verifies that the global anneal parameter s(t) follows the desired schedule across the full 1–2000 µs range.
   e) Read-out calibration – sets the discrimination threshold for the dc-SQUID readout of each qubit. Bit-flip read-out error probability after calibration is ≈2×10⁻³.
   The resulting calibration tables are loaded into the classical control system; when the user asks for hᵢ, J_ij, the controller looks up the corresponding bias currents.

3. Numbers that have been published
   (values for Advantage and earlier 2000-qubit Chimera processors)
   • Working-qubit yield: 95–99 %
   • Working-coupler yield: 90–95 %
   • Residual intrinsic control error (ICE):
   σ_h ≃ 0.02, σ_J ≃ 0.02 (quoted in dimensionless user units, relative to |h|≤2, |J|≤1).
   • Effective temperature T_eff ≈ 12 mK (Chimera) / 15 mK (Advantage), which sets the Boltzmann scale k_B T ≈ 0.25 GHz ≈ 10⁻² of the maximum programmable energy.
   • 1/f flux-noise spectral density A_Φ ≈ 5–10 µΦ₀ /√Hz at 1 Hz (translates into dephasing times of a few ns in the microwave regime, though that is not the dominant error mechanism during an anneal).

These figures are distilled from the calibration data but are essentially processor-averaged; D-Wave does not release the full per-qubit table.

4. Information a user can retrieve today
   Through Ocean you can inspect

from dwave.system import DWaveSampler
qpu = DWaveSampler()
print(qpu.properties.keys())

which returns among others
• ‘num_qubits’, ‘qubits’ – list of working qubits
• ‘couplers’ – list of working couplers
• ‘h_range’, ‘j_range’, ‘max_anneal_schedule_points’, ‘anneal_offset_ranges’, …
Those properties do not expose the raw calibration data but do allow you to see, for example, which qubits have the narrowest anneal-offset range (a proxy for qubit-to-qubit variation). Users who want to mitigate residual ICE typically employ application-level techniques such as gauge transformations, minor-embedding with chain-strength tuning, and anneal-offset corrections, all of which are documented in the Ocean tools.

5. Can one measure “fidelity” oneself?
   You can always run a known Ising instance whose ground state is trivial (all spins up, say) and estimate the probability that the processor returns that state; this gives an upper bound on the total error probability of the whole anneal-plus-readout process, but it is not a per-qubit figure and cannot be factorised into a gate-style fidelity because the errors are highly correlated in time and across qubits.

Conclusion
There is therefore no single “qubit fidelity” number for a D-Wave machine analogous to, say, the 99.9 % single-qubit gate fidelity reported for circuit-model superconducting qubits. Instead D-Wave internally performs a detailed calibration that reduces static control errors to the percent level and publishes global performance characteristics. Users who need to assess or mitigate residual errors do so at the problem level (gauge averaging, hardworking schedules, embedding diagnostics) rather than by referring to per-qubit fidelity metrics.